1. Field of the Invention
Embodiments of the invention relate to semiconductor memory devices. More particularly, embodiments of the invention relate to a flash memory device configured to store multi-bit data on one cell.
2. Discussion of Related Art
Storage devices such as volatile and non-volatile memories have been increasingly utilized in mobile electronic devices such as MP3 players, PMPs, mobile phones, laptops, PDAs, etc. However, these mobile devices require high capacity memory storage to provide various operational functions (e.g., multimedia). One type of memory storage device is a multi-bit memory device which is used to store more than 2-bit data on one memory cell. These exemplary multi-bit memory devices are disclosed in U.S. Pat. No. 6,122,188, entitled “NON-VOLATILE MEMORY DEVICE HAVING MULTI-BIT CELL STRUCTURE AND A METHOD OF PROGRAMMING SAME”, and in U.S. Pat. No. 5,923,587, entitled “MULTI-BIT MEMORY CELL ARRAY OF A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME” which are hereby incorporated by reference.
When storing 1-bit data on a memory cell, the memory cell has a threshold voltage included in one of two threshold voltage distributions. That is, the memory cell has one of two states representing data 1 or data 0. However, when storing 2-bit data on one memory cell, the memory cell has a threshold voltage included in one of four threshold voltage distributions where the four states represent data 11, data 10, data 00, and data 01. Two data bits stored in each memory cell respectively constitutes page data (hereinafter, referred to as least significant bit (LSB) data and a most significant bit (MSB) data). An LSB data bit is programmed into a memory cell and then an MSB data bit is programmed into the same memory cell. This is called a page program method.
A memory cell may be programmed to have one of the states 11, 10, 00, and 01. For convenience, states 11, 10, 00, and 01 correspond to ST0, ST1, ST2, and ST3, respectively. A threshold voltage of a memory cell with state 11 is an erased memory cell. A threshold voltage of a memory cell with state 10 is higher than that of a memory cell with state 11. A threshold voltage of a memory cell with state 00 is higher than that of a memory cell with state 10. A threshold voltage of a memory cell with state 01 is higher than that of a memory cell with state 00. As illustrated in FIG. 1a, once an LSB program operation is performed a memory cell has an erased state corresponding to state 10 (ST1). Once an MSB program operation is performed after the LSB program operation, as illustrated in FIG. 1b, the memory cell having state 11 has an erased state 01, but the memory cell with state 10 has states 10 or 00. That is, the memory cell is programmed with state 01 when LSB data is 1 and programmed with state 00 when the LSB data is 0. The MSB program operation is performed using an LSB data value programmed during the LSB program operation. The LSB data are read from the memory cell before performing the MSB program operation which is performed according to the read LSB data. This read operation is called an initial read operation.
The above page program method requires an initial read operation and causes disturbances due to an increase in the number of program operations. The number of program operations includes the LSB program operation and the MSB program operation where each program operation includes a plurality of program loops.